The performance counter “MEM_LOAD_UOPS_RETIRED_L3_HIT” alerted Twitter to InstLatX64. Although the L3 cache is black on white, as is apparent from the listing below, there is some reason to doubt.
Not a doubt about the veracity of this statement, but doubts about the interpretation of this information. The presence of the L3 cache on the new Atoms is just one way to interpret the statement. Atoms Elkhart Lake are not the only product that will be produced on kernels Tremont . Intel uses the Tremont kernel on the hybrid processor Lakefield from project Foveros where a large x86 kernel with small Atoms and a new integrated graphics will be added.
When looking at the first half of the scheme Lakefield we see under the four small CPU cores ( Tremont ) shown by the L2 cache . Something below is a block mentioning, among other things, “4M LLC”, 4 MB Last Level Cache. A lower-level cache is L3, in other words we are looking at a product that contains kernels Tremont and L3 cache at the same time. The counter from the statement may therefore be specifically related to this product and may not mean that Atoms with nuclei Tremont will normally be equipped with L3 cache.
Of course it can’t be ruled out, on the other hand, why would ordinary Atoms have L3 cache? They are far from such a performance that their absence would be limiting for them. Take the existing Atom Pentium Silver J5005, for example. According to the PassMark database it reaches about 2900 points. For reference we can use 28nm APU AMD Bristol Ridge which also does not have L3 cache. It reaches (A12-9800) 5500 points. Atoms are still far enough away from the performance partitions, which can be easily achieved with a processor without L3 cache. At the same time, it shows us that AMD would have been able to convert the old x86 kernel Excavator to a newer than the 28nm process on Intel’s Atom competition. However, this core, albeit of a very interesting potential, seems to have decided to let AMD die together with everything that originated before Zen .
However, it is certain that mobile processors do not need this L3 cache level, so it is possible that the L3 indicated by the counter is related to a very specific product (such as Lakefield ) Kernel Atoms Tremont .